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Power Supply Design and Implementation
The development of a power supply capable of converting a 24V input into ±12V outputs was a critical component of the project. This section outlines the journey from simulation to the realization of the power supply, detailing the design choices, challenges encountered, and the solutions implemented to achieve a functional power supply that meets the project's requirements. The initial challenge was to design a power supply that could efficiently split a 24V input into symmetrical ±12V outputs. The design process began with simulations to explore various configurations and components that could achieve the desired output while maintaining stability under different load conditions.
Op-amps and MOSFET Configuration
A pivotal decision in the design was the use of operational amplifiers (Op Amps) and Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) to regulate the output voltages. The LM741 Op Amps were configured to compare feedback voltage from the output with a reference voltage, adjusting the gate voltage of the MOSFETs to maintain the desired ±12V outputs. This configuration was crucial for stabilizing the output voltage and maintaining the virtual ground at 0V, ensuring that the power supply could adapt to changes in load without significant deviations in output voltage.
Virtual Ground Concept
The concept of a virtual ground played a significant role, allowing me to create a midpoint that effectively split the 24V input into positive and negative 12V outputs. The initial design utilized two op-amps to keep the virtual ground at 0V. After receiving feedback, the design was modified to only use one op-amp by using the single op-amp to drive the gates of both MOSFETs rather than two op-amps driving each gate. See schematic on the left for refined op-amp design.
Heat Dissipation
Another significant issue was the excessive heat generated by the MOSFETs under high current loads. Large heatsinks were added to the MOSFETs to improve heat dissipation. Despite this, concerns remained about the long-term reliability of the power supply under continuous operation. This led to further optimizations in the circuit design to reduce power loss and improve efficiency such as a fan. See image on the right for the final power supply implemented on a breadboard with heatsinks on each MOSFET and a fan to further dissipate large amounts of heat.
Analog to Digital Converter (ADC) Design and Simulation
The development of the Analog to Digital Converter (ADC) for the project was a critical step towards achieving precise and real-time monitoring of current levels within our system. After evaluating various ADC architectures, I decided to pursue the Successive Approximation Register (SAR) ADC approach. This decision was made because of the SAR ADCs balance between speed, accuracy, and complexity, making it suitable for the application's requirements. This section outlines the design process, simulation results, and the rationale behind my design choices for the ADC.
SAR ADC Configuration
The SAR ADC was meticulously crafted to sense current. First, I employed a set of three parallel-connected 1Ω shunt resistors to accurately detect the current flowing through the load, since it is wired in series between the power supply and the system. These shunt resistors, due to their parallel configuration, effectively present a combined resistance of 1⁄3Ω, necessitating an amplification of the resultant voltage signal to ensure adequate signal strength for comparison. This amplification is achieved by a differential amplifier with a precisely set gain of 3, which scales the signal to a level suitable for comparison. The amplified signal is then inverted by an inverting operational amplifier to prepare for comparison. The pulse width modulation (PWM) circuit, which includes an RC filter and a buffering operational amplifier, provides a time-varying comparison voltage. The buffered signal is then directed to a comparator input, where it is compared against the reference voltage from our shunt readings. The comparator’s role is to generate a binary output that switches state when the filtered PWM signal crosses the shunt reference reading. This binary output is connected to a GPIO for processing the ADC program (developed by a team member) to accurately calculate power usage.
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